Input-Output Organization, Interrupts, and Assembly Language

What is I/O Organization? (In Simple Words)

A computer is useless if it cannot talk to us. It must take input from a keyboard and display output on a monitor.

The Huge Speed Problem:

• The CPU runs at lightning speeds—executing billions of instructions every second.
• Humans type very slowly—maybe 2 to 4 keystrokes per second.
• If the CPU sat idle waiting for your finger to press a key, 99.9% of its processing power would be completely wasted!

To fix this speed mismatch, computers use I/O Registers, Handshaking Flags, and Interrupts.

1. Input-Output Configuration and Flags

The computer talks to input/output devices using two 8-bit registers and two 1-bit status flags:

How the Handshaking Flags Work:

• FGI (Input Flag):
  When you press the key 'B', its 8-bit code lands in INPR, and the flag FGI becomes 1.
  The CPU sees that FGI = 1, grabs the character into Accumulator (AC), and immediately resets FGI = 0 to get ready for the next key.
• FGO (Output Flag):
  While the monitor or printer is busy drawing letters, FGO is 0.
  When it is finished and ready for the next letter, it sets FGO = 1.

2. Input-Output Instructions

All I/O instructions have the opcode 111 (D₇ = 1) with mode bit I = 1:

3. The Program Interrupt Cycle

Why Do We Need Interrupts? (Polling vs. Interrupts)

• Polling (Programmed I/O): The CPU continuously loops checking: “Did you press a key? Did you press a key?” This locks up the CPU and wastes full processor power.
• Interrupts: The CPU does useful work (e.g., playing music, calculating spreadsheets). When you finally hit a key, the keyboard rings an electronic bell called an Interrupt! The CPU pauses for a microsecond, handles the keypress, and goes right back to its work.

💡 Real-Life Indian Student Analogy:

• Polling: Standing at your hostel gate for 2 hours waiting for your Swiggy delivery. You cannot study!
• Interrupt: You study peacefully in your room. When the delivery driver arrives, he calls your phone. You pick up the food and go straight back to studying. Interrupts save time!

3 Hardware Steps of the Interrupt Cycle:

When an interrupt arrives (IEN = 1 and FGI = 1 or FGO = 1):

1. Step 1 (T₀’): CPU prepares memory location 0 and stores the current return address:
   AR ← 0, TR ← PC
2. Step 2 (T₁’): Saves the return address into RAM memory location 0, and resets PC:
   M[AR] ← TR, PC ← 0
3. Step 3 (T₂’): Sets PC to 1 (where the Interrupt Service Routine program lives), turns off further interrupts, and starts execution:
   PC ← PC + 1, IEN ← 0, R ← 0, SC ← 0

Returning Back to Normal: At the end of the interrupt handler, an indirect jump instruction BUN 0 I fetches the return address saved in location 0 and puts it back into PC. The normal program resumes right where it was paused!

4. Machine Language vs. Assembly Language

💡 DAVV Exam Preparation Tips

5-Mark Question: “Explain the roles of INPR, OUTR, FGI, and FGO in basic computer communication.”

• Draw the block diagram connecting Keyboard to INPR, and OUTR to Monitor.
• Define FGI (Input Flag) and FGO (Output Flag).
• Explain the 3-step handshaking cycle: key pressed → flag set to 1 → CPU reads character → flag cleared to 0.

10-Mark Question: “What is an Interrupt? Why is it preferred over polling? Describe the hardware implementation of the Interrupt Cycle with complete RTL equations.”

• Explain polling vs interrupt using the doorbell/phone call analogy.
• Write down the 3 timing steps:
  • T₀': AR ← 0, TR ← PC
  • T₁': M[AR] ← TR, PC ← 0
  • T₂': PC ← PC + 1, IEN ← 0, R ← 0, SC ← 0
• Explain how BUN 0 I restores normal execution by loading the saved return address back from memory location 0 into PC.