Flip-Flops: SR, D, JK, Master-Slave JK, and T Flip-Flop
What is a Flip-Flop? (In Simple Words)
A Flip-Flop is the smallest memory cell in computer hardware.
- It can store exactly one binary bit (either a 0 or a 1).
- It holds this bit safely as long as the computer is turned ON.
- Unlike logic gates that calculate and forget, a flip-flop remembers its value until a clock pulse tells it to change!
💡 Real-Life Indian Student Analogy:
Think of a classroom wall switch.
If you press it down, the light stays ON even after you take your finger away.
It remembers its state until someone physically presses it back up! A flip-flop is an electronic switch with that same memory.
1. SR (Set-Reset) Flip-Flop
The SR Flip-Flop has two control inputs:
- S (Set): Makes output
1. - R (Reset): Clears output to
0. - CLK (Clock): Tells the circuit when to update.
Truth Table:
| Clock | S | R | Next State Q(next) | Action |
|---|---|---|---|---|
| ↑ | 0 | 0 | Q(current) | No Change (Memory State) |
| ↑ | 0 | 1 | 0 | Reset (Output becomes 0) |
| ↑ | 1 | 0 | 1 | Set (Output becomes 1) |
| ↑ | 1 | 1 | Invalid / ? | Forbidden State (Both try to be 0) |
Characteristic Equation:
Q(next) = S + R’ • Q (where S • R = 0)
⚠️ The SR Problem: You must never apply
S = 1andR = 1together. It confuses the circuit because you cannot tell the output to become 1 and 0 at the same time!
2. D (Data / Delay) Flip-Flop
The D Flip-Flop solves the SR forbidden problem completely.
- It has only one data input: D.
- Whatever bit is present at D is safely copied into memory on the next clock tick!
Truth Table:
| Clock | Input D | Next State Q(next) | Action |
|---|---|---|---|
| ↑ | 0 | 0 | Stores binary 0 |
| ↑ | 1 | 1 | Stores binary 1 |
Characteristic Equation:
Q(next) = D
- Where is it used? D flip-flops are used in CPU registers, RAM memory cells, and cache memory.
3. JK Flip-Flop (The Universal Flip-Flop)
The JK Flip-Flop fixes the forbidden condition of the SR flip-flop.
- J works like Set (
1). - K works like Reset (
0). - When both
J = 1andK = 1, it toggles (flips the previous bit: 0 becomes 1, and 1 becomes 0).
Truth Table:
| Clock | J | K | Next State Q(next) | Action |
|---|---|---|---|---|
| ↑ | 0 | 0 | Q(current) | No Change |
| ↑ | 0 | 1 | 0 | Reset |
| ↑ | 1 | 0 | 1 | Set |
| ↑ | 1 | 1 | Q’(current) | Toggle (Inverts previous output) |
Characteristic Equation:
Q(next) = J • Q’ + K’ • Q
Race-Around Condition and Master-Slave JK Flip-Flop
-
What is Race-Around?
In a level-triggered JK flip-flop, whenJ = 1andK = 1, the output toggles.
If the clock pulse stays HIGH longer than the circuit takes to react, the output will rapidly flip back and forth like crazy (1 → 0 → 1 → 0) multiple times during one clock pulse!
When the clock finally drops, nobody knows whether the output ended on 0 or 1. -
The Master-Slave Solution:
We connect two flip-flops back-to-back:- Master Flip-Flop: Connected directly to the clock. When Clock = 1, it reads inputs while the Slave is locked.
- Slave Flip-Flop: Connected to an inverted clock (
CLK'). When Clock drops to 0, the Master locks and the Slave copies the result to the output pins. Because both stages never operate together, race-around is 100% eliminated!
4. T (Toggle) Flip-Flop
The T Flip-Flop is made by joining inputs J and K together into one single wire called T.
- If
T = 0: It keeps the previous value (No change). - If
T = 1: It inverts the previous value (Toggle: 0 becomes 1, 1 becomes 0).
Truth Table:
| Clock | Input T | Next State Q(next) | Action |
|---|---|---|---|
| ↑ | 0 | Q(current) | No Change |
| ↑ | 1 | Q’(current) | Toggle |
Characteristic Equation:
Q(next) = T ⊕ Q
- Where is it used? T flip-flops are the building blocks of digital counters and digital clocks.
5. Quick Excitation Table
When designing counters, you need to know what inputs to apply to jump from current state Q to next state Q_next:
| State Transition (Q → Q_next) | S R | J K | D | T |
|---|---|---|---|---|
| 0 → 0 | 0 X |
0 X |
0 |
0 |
| 0 → 1 | 1 0 |
1 X |
1 |
1 |
| 1 → 0 | 0 1 |
X 1 |
0 |
1 |
| 1 → 1 | X 0 |
X 0 |
1 |
0 |
(Note: X means Don’t Care; it can be either 0 or 1).
💡 DAVV Exam Preparation Tips
5-Mark Question: “What is the race-around condition in a JK flip-flop? How does a Master-Slave JK flip-flop solve it?”
- Define race-around: Output toggles uncontrollably multiple times when
J = 1,K = 1, and clock pulse width is greater than gate delay.- Draw the Master-Slave block diagram: Master gets CLK, Slave gets inverted CLK.
- Explain the 2-phase operation: Master reads when CLK = 1; Slave outputs when CLK = 0.
10-Mark Question: “Describe SR, JK, D, and T flip-flops with logic diagrams, truth tables, characteristic equations, and excitation tables.”
- Write clear sections for all 4 flip-flops: SR, D, JK, and T.
- Draw logic diagrams using NAND or NOR gates.
- Write the characteristic equations:
- SR:
Q(next) = S + R'Q- D:
Q(next) = D- JK:
Q(next) = JQ' + K'Q- T:
Q(next) = T ⊕ Q- Draw the summary 4-row excitation table at the end.