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Multiplexers, Demultiplexers, Encoders & Decoders

Study material and explanations for Unit 2

Multiplexers, Demultiplexers, Encoders, and Decoders

Overview: Digital Traffic Directors in Computers

Inside a computer, many devices (CPU, RAM, Hard Disk, Graphics Card) must share common data wires.

  • If all devices sent signals at the exact same moment, data would collide and get ruined!
  • To prevent this, computer hardware uses Multiplexers, Demultiplexers, Decoders, and Encoders to manage traffic smoothly.
Data Routing Circuits at a Glance
Multiplexer (MUX)
2ⁿ → 1 (Data Selector)
Takes many input lines and connects only one to the output line.
Demultiplexer (DEMUX)
1 → 2ⁿ (Data Distributor)
Takes one input line and routes it to one of many output lines.
Decoder
n → 2ⁿ (Code Expander)
Reads an n-bit binary code and turns ON one specific output line.
Encoder
2ⁿ → n (Code Compressor)
Takes an active input line and compresses it into a binary number.

1. Multiplexer (MUX) — The Data Selector

A Multiplexer has:

  • 2ⁿ data input lines
  • n select control lines
  • Only 1 output line

The Select Lines act like a steering wheel: they choose which input signal reaches the single output.

💡 Real-Life Indian Student Analogy:
Think of a railway junction outside a busy railway station.
4 train tracks merge down into 1 single platform track.
The signal operator sets the track switch to let only one train enter the platform at a time. A MUX is that electronic track switch!

4-to-1 Multiplexer:

  • Inputs: 4 data lines (I₀, I₁, I₂, I₃)
  • Select Lines: 2 lines (S₁, S₀) because 2² = 4
  • Output: Y

Function Table:

Select Line S₁ Select Line S₀ Selected Output Y
0 0 I₀
0 1 I₁
1 0 I₂
1 1 I₃

Boolean Equation:

Y = S₁’S₀’I₀ + S₁’S₀I₁ + S₁S₀’I₂ + S₁S₀I₃


2. Demultiplexer (DEMUX) — The Data Distributor

A Demultiplexer does the exact opposite of a MUX:

  • Has 1 data input line (Din)
  • Has n select lines
  • Has 2ⁿ output lines

The select lines decide which output wire receives the single incoming data bit. All other output wires stay 0.

1-to-4 Demultiplexer:

  • Select lines S₁, S₀ steer the input Din to one specific output line (Y₀, Y₁, Y₂, Y₃).

Boolean Expressions:

  • Y₀ = S₁'S₀' • Din
  • Y₁ = S₁'S₀ • Din
  • Y₂ = S₁S₀' • Din
  • Y₃ = S₁S₀ • Din

3. Decoders (e.g., 3-to-8 Line Decoder)

A Decoder takes an n-bit binary code and turns ON exactly one of its 2ⁿ output lines.

💡 Real-Life Indian Student Analogy:
When the professor calls out Roll Number 15 in the classroom, only one student raises their hand and stands up. A decoder works the exact same way!

Where is a Decoder Used?

  • RAM Memory Addressing: The CPU sends a binary address (e.g., 101), and the decoder turns ON that exact memory cell to read or write data.
  • 7-Segment Display: Translates binary numbers to light up digits on a microwave or calculator screen.

3-to-8 Decoder Operation:

  • Inputs: 3 binary lines (A, B, C) and 1 Enable pin (E).
  • Outputs: 8 lines (Y₀ to Y₇).
  • If E = 0: The decoder is OFF; all outputs stay 0.
  • If E = 1: The binary input selects that exact output number:
    • Input 000 → Y₀ = 1
    • Input 101 (binary 5) → Y₅ = 1
    • Input 111 (binary 7) → Y₇ = 1

4. Encoders and Priority Encoders

An Encoder does the reverse of a decoder:

  • It takes 2ⁿ input lines (where only one line is pressed or active) and outputs the matching n-bit binary number.
  • Example: When you press button 7 on a numeric keypad, the encoder converts it to 0111.

What is a Priority Encoder?

In a basic encoder, if you press two buttons at once, the output becomes corrupted garbage.

  • A Priority Encoder fixes this by assigning importance to each line.
  • If multiple inputs are HIGH at the same time, it picks the highest priority input and ignores the lower ones!
  • Use: Crucial for CPU Interrupts (e.g., Power Failure signal takes priority over a mouse click).

💡 DAVV Exam Preparation Tips

5-Mark Question: “What is a Multiplexer? Draw the logic circuit diagram and truth table of a 4-to-1 MUX.”

  • Define MUX: A combinational circuit that selects one of 2ⁿ inputs and routes it to 1 output.
  • Draw the block diagram showing 4 inputs (I₀-I₃), 2 select lines (S₁, S₀), and 1 output (Y).
  • Write the SOP equation: Y = S₁'S₀'I₀ + S₁'S₀I₁ + S₁S₀'I₂ + S₁S₀I₃.
  • Draw the logic circuit using 4 AND gates, 2 NOT gates, and 1 OR gate.

10-Mark Question: “Explain 3-to-8 line decoder with enable input. How can two 3-to-8 decoders be cascaded to construct a 4-to-16 line decoder?”

  • Draw the 3-to-8 truth table and explain the role of Enable (E).
  • Cascading for 4-to-16:
    • Inputs are A, B, C, D (where A is the MSB).
    • Connect B, C, D to both 3-to-8 decoders.
    • Connect A through a NOT gate to the Enable pin of Decoder 1 (handles numbers 0 to 7).
    • Connect A directly to the Enable pin of Decoder 2 (handles numbers 8 to 15).